The present invention relates to a method of and an apparatus for effecting frequency translation at microwave frequencies, and in particular to a frequency translation scheme which works at L-band, using an analog-to-digital sampling scheme which enables elimination of multiple-step mixer/local oscillator circuitry at the front end. The invention contemplates applicability to both reception (downconversion) and transmission (upconversion) at frequencies of 2 GHz or less.
FIG. 1 shows a block diagram of a typical frequency-tunable RF-to-baseband downconverter, employing a triple analog conversion scheme with a quadrature third conversion stage. An L-band filter 102 filters an L-band RF input from a low noise amplifier (LNA). A first amplifier 104 receives the filtered output of the filter 102 and provides an amplified output to a first mixer 106, which also receives an output of a fixed local oscillator (LO) 120. The output of mixer 106 is provided to a first intermediate frequency (IF) filter 108, whose output is provided to a second amplifier 110, which comprises a variable gain amplifier which is driven by an automatic gain control (AGC) signal derived from demodulator 150.
The output of amplifier 110 is provided to a second mixer 112, which also receives an output of a tunable LO 122. The output of mixer 112 is provided to a second IF filter 114, whose output in turn is provided to a third amplifier 116. The output of amplifier is provided to mixers 132, 134. Mixer 132 receives an output of fixed LO 124 which is 90.degree. out of phase (via phase shifter 126) from the LO 124 output which is provided to mixer 134. A high-stability frequency reference oscillator 130 provides reference values to the respective LOs.
The respective outputs of mixers 132, 134 are filtered in baseband filters 136, 138, and converted in respective analog-to-digital (A/D) converters 140, 142. The outputs of A/D converters 140, 142, which are quadrature and in-phase values, respectively, are provided to a digital signal processor (DSP) based demodulator 150, which provides a demodulated output.
Variations employing different numbers of conversion stages also are known. In any event, each such conversion stage requires a mixer, an LO, and a filter to remove the undesired mixer products. A variable gain amplifier, which is placed in one of the stages for gain control, is driven by an AGC signal derived from the demodulator.
As shown in FIG. 1, the second conversion stage uses a tunable LO for channel selection. The third LO is split into its in-phase (I) and quadrature (Q) components. As a result, the final downconversion to baseband is complex, requiring two mixers and two lowpass filters. The I and Q baseband signals each are then sampled by an A/D converter. The resulting complex digital signal is sent to a digital signal processor for subsequent matched filtering, demodulation, carrier recovery, and bit detection.
Typically, each LO is phase-locked to a high-stability crystal frequency reference oscillator 130, as shown, in order to maintain a high degree of frequency tuning accuracy. Implementation of the tunable LO 122 is based on one of three methods:
i) Analog frequency synthesis, in which a signal at the desired frequency is obtained by controlling one or more analog phase locked loop (PLL) circuits. The exact number of loops required depends on the total tuning range, step size, and phase-noise performance. PA1 ii) Direct digital synthesis (DDS), in which the sine (and cosine) waveform at the desired frequency is generated digitally and is converted to an analog signal with a digital-to-analog (D/A) converter. PA1 iii) Hybrid analog PLL/DDS, in which the output of a DDS synthesizer is mixed with the outputs of one or more analog phase locked loops to give some of the advantages of both techniques. PA1 i) The reference oscillator 130 often requires an oven to maintain precise temperature control to minimize frequency drift. For low bit-rate phase shift keying (PSK) or quadrature amplitude modulation (QAM) systems, the total frequency error in the downconversion process must be much less than the transmission symbol rate in order to minimize losses in the demodulator matched filter and for the carrier tracking loop to acquire successfully. PA1 ii) Analog frequency synthesizers are difficult to design for low phase noise, especially if a fine step size is required. The PLL loop bandwidth is directly proportional to the synthesizer step size. As the loop bandwidth is decreased, the loop is less able to track the extremely low phase distortion of the crystal reference oscillator accurately. A 1 Hz step size, which is desired, requires a large number of components, increasing system cost. PA1 iii) DDS synthesizers exhibit low phase noise characteristics, but suffer from relatively high levels of spurious emissions. Performance is limited by the resolution and dynamic characteristics of the subsequent D/A converter. The maximum frequency available from a DDS synthesizer currently is limited to below 100 MHz, and thus is unsuitable for operation at L-band. PA1 iv) Hybrid analog/digital synthesizers can achieve very low phase noise and extremely high frequency resolution, but again a large number of components is required. PA1 v) Quadrature sampling requires an LO splitter with a precise 90.degree. phase difference between the two channels. The two mixers, baseband filters, and A/D converters also must have precise phase and gain matching. PA1 vi) The baseband filter must have a constant group delay versus frequency response and minimal passband gain ripple so as to minimize intersymbol interference. Typically, an equalization network is required. PA1 vii) The use of multiple conversion stages requires careful construction techniques in order to avoid interference between stages. The mixers must be laid out so as to maximize the isolation between ports. PA1 viii) The use of several stages of mixing and amplification often creates large DC offsets to the A/D converter. Typically either an analog nulling circuit preceding the A/D converter or a digital nulling algorithm following the A/D converter is required.
A primary disadvantage resulting from the scheme shown in FIG. 1 is the large number of components required. The analog filters often are large, require precise component matching, and are difficult to incorporate into an integrated circuit. Other disadvantages include the following:
Other known approaches include the following.
U.S. Pat. Nos. 4,737,728, 5,142,553, and 5,172,070 disclose fixed-frequency receive-only schemes which have some of the disadvantageous, space-taking mixer-oscillator structure shown in FIG. 1. The '728 patent does not sample at RF frequencies. The '553 patent refers to an "HF" carrier signal, but is not specific as to the frequency of that signal. Sampling is carried out after two mixing stages which downconvert the signal to an IF frequency.
U.S. 4,884,265 discloses a receive-only scheme operating at frequencies well below L-band.
None of the aforementioned patents discloses an efficient temperature compensation scheme--an essential element in order to minimize frequency drift.
Other conventional techniques include those disclosed in the following U.S. Pat. Nos. 4,117,541; 4,138,730; 4,241,443; 4,312,062; 4,316,282; 4,636,972; 4,859,960; 4,910,469; and 5,077,531.
It would be desirable to implement a frequency conversion scheme which is tunable to different frequencies, which compensates efficiently for frequency drift without altering the operation of the reference oscillator, and which is applicable not only to reception but also to transmission, particularly at microwave frequencies (2 GHz and below). Such a system should operate at high resolution (preferably 1 Hz), and at low phase noise.